Our tester baseboard, now in its second revision is a single, consistent platform for testing all of the group's chips. It provides: To read more about the baseboard, and its original plan see this webpage. There is also a presentation which contains photos, diagrams, and serves as an overview.




The front of the baseboard with daughtercard attached. Another photo shows an unpopulated daughtercard with connectors visible. The back of the baseboard with power supplies, Xilinx, etc visible