SCALE Group Hardware Artifacts

		Assam Test Chip 1 ATC1 is the second testchip designed and implemented by the SCALE group. It is fabricated using TSMC 0.18 micron techonology through MOSIS. ATC1 consists of two separate modules: an ASIC module implementing AHIP (asynchronous host interface protocol) and a DSP kernel (RGBYCC translation) and a chunks of custom-made huge inverter chains with body bias control.
		Assam Test Chip 0 ATC0 is the first testchip designed and implemented by the SCALE group. It is fabricated using TSMC 0.18 micron techonology through MOSIS. It has a testing infrastructure and several SRAM blocks as devices-under-test on-chip.
		Handheld Video-over-IP We have developed a working handheld video-over-IP application to demonstrate the potential of reconfigurable logic in accelerating handheld applications.
		Tester Baseboard Our tester baseboard (atb1) is a single, consistent platform for testing all of the group's chips. It has several voltage-adjustable and current-monitored power supplies, DRAM to store current measurements, a adjustable PECL clock, and a Xilinx FPGA to control everything and serve as a reconfigurable interface between a host computer and the chip being tested.

Under Development

• Handheld Power Tracker
• DRAM Power Measurement Board

Funding

We gratefully thank our past and present sponsors, including NSF, DARPA, CMI, Project Oxygen, Epoch-IT, Infineon, Intel, SGI, and MOSIS Educational Program (MEP).